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基于改进动态配置的FPGA卷积神经网络加速器的优化方法 认领

Optimization method of FPGA convolutional neural network accelerator based on improved dynamic configuration
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摘要 卷积神经网络(CNN)已广泛应用于各种计算机视觉任务,基于GPU的卷积神经网络加速器往往存在功耗较高、体积较大和成本较高的问题。针对上述问题,文中提出一种基于改进动态配置的现场可编程门阵列(FPGA)卷积神经网络加速器的优化方法。使用高层次综合工具,在引入分割参数的基础上,通过在资源约束情况下基于流水线结构的层间模块复用,采用8-16位动态定点设计方案,以有限的硬件资源实现性能优化的卷积神经网络硬件结构,提升计算效率的同时缩短了开发周期。利用该方法在ZCU102平台上构建实现了AlexNet网络和VGG网络。在最大精度损失0.63%的条件下,将加速器性能分别从46.3fps和37.2fps提高到290.7fps和54.4fps,计算能效分别达到了TITAN-X的1.78倍和3.89倍。实验数据充分说明,采用改进动态配置的优化方法,利用高层次综合工具进行开发的FPGA卷积加速器,既满足了计算实时性的要求,同时也解决了功耗和体积问题,验证了本方法的有效性。 Convolutional neural network(CNN)has been widely employed for various computer vision tasks.GPU-based convolutional neural network accelerators often have problems of high-power consumption,large size and high cost.Aiming at the above problems,this paper proposes an optimization method of field programmable gate array(FPGA)convolutional neural network accelerator based on improved dynamic configuration.High-level synthesis tools are used to achieve performance optimization with limited hardware resources and the 8-16 bit dynamic fixed-point,and utilizes the pipeline structure-based inter-layer module multiplexing under resource constraints,which improves the computational efficiency and shortens the development cycle.This method is used to build and implement the AlexNet network and VGG network on the ZCU102 platform.With 0.63%accuracy loss,the accelerator performance is improved from 46.3fps and 37.2fps to 290.7fps and 54.4fps respectively,and the calculation energy efficiency reaches 1.78 times and 3.89 times compared to TITAN-X respectively.The experimental data fully demonstrates that the FPGA convolution accelerator developed by the high-level synthesis tool adopts the improved dynamic configuration optimization method,which not only satisfies the requirements of real-time calculation,but also solves the power consumption and volume problem,and verifies the effectiveness of the proposed method.
作者 陈朋 陈庆清 王海霞 张怡龙 刘义鹏 梁荣华 Chen Peng;Chen Qingqing;Wang Haixia;Zhang Yilong;Liu Yipeng;Liang Ronghua(College of Computer Science and Technology,Zhejiang University of Technology,Hangzhou 310000;College of Information Engineering,Zhejiang University of Technology,Hangzhou 310000)
出处 《高技术通讯》 EI CAS 北大核心 2020年第3期240-247,共8页 Chinese High Technology Letters
基金 国家自然科学基金(U1909203,61527808) 浙江省属高校基本科研业务费专项资金(RF-C2019001) 浙江省重点研发计划(2019C01007)资助项目。
关键词 卷积神经网络(CNN) 现场可编程门阵列(FPGA) 模块复用 流水线 动态定点 convolution neural network(CNN) field programmable gate array(FPGA) module multiplexing pipeline dynamic fixed
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