针对VLSI中的互连线信号完整性问题,研究温度和频率对电阻、电感和电容的影响。在温度和频率的作用下,采用多节RLC模型,分别探讨温度和频率对互连线电学特性的影响,研究互连线的信号完整性问题。结果表明:在温度和频率的双重影响下,对温度和频率比较敏感的第5层互连线,在信号上升时间为0. 05 ns,负载是0. 1pF电容时,信号的延迟比没有考虑温度和频率影响时的延迟多121 ps;当负载是电阻时,延迟变化不大。温度对串扰的影响较小,频率对串扰的影响较大,在温度和频率的双重影响下,阻性负载时远端串扰变大,近端串扰变小,而容性负载时近端串扰和远端串扰都变小。
The influence of temperature and frequency on resistance,inductance,and capacitance of interconnects signal integrity in VLSI was studied. The electrical characteristics of interconnects is calculated. The signal integrity of interconnects was studied with a multi-sectional RLC model under the effect of temperature and frequency. The experiment showed that when the rise time of signal was 0. 05 ns and the load capacitance was 0. 1 pf,the delay of signal on the fifth layer interconnects,which was sensitive to temperature and frequency,was about 121 ps more than that in which temperature and frequency were not considered. For the resistance load,the delay varied slightly.Temperature had little influence on crosstalk,while frequency had much influence on it. When temperature and frequency were applied together,the far-end crosstalk became larger,while the near-end crosstalk became smaller for resistance load. For capacitance load,both far-end crosstalk and near-end crosstalk became smaller.
Journal of Harbin Engineering University